| Internet-Draft | SR Algorithm in PCEP | April 2023 |
| Tokar, et al. | Expires 26 October 2023 | [Page] |
The Algorithm associated with a prefix Segment-ID (SID) defines the path computation Algorithm used by Interior Gateway Protocols (IGPs). This information is available to controllers such as the Path Computation Element (PCE) via topology learning. This document proposes an approach for informing headend routers regarding the Algorithm associated with each prefix SID used in PCE-computed paths, as well as signalling a specific SR algorithm as a constraint to the PCE.¶
The key words "MUST", "MUST NOT", "REQUIRED", "SHALL", "SHALL NOT", "SHOULD", "SHOULD NOT", "RECOMMENDED", "NOT RECOMMENDED", "MAY", and "OPTIONAL" in this document are to be interpreted as described in BCP 14 [RFC2119] [RFC8174] when, and only when, they appear in all capitals, as shown here.¶
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A PCE can compute SR-TE paths using SIDs with different Algorithms depending on the use-case, constraints, etc. While this information is available on the PCE, there is no method of conveying this information to the headend router.¶
Similarly, the headend can also compute SR-TE paths using different Algorithms, and this information also needs to be conveyed to the PCE for collection or troubleshooting purposes. In addition, in the case of multiple (redundant) PCEs, when the headend receives a path from the primary PCE, it needs to be able to report the complete path information - including the Algorithm - to the backup PCE so that in HA scenarios, the backup PCE can verify the prefix SIDs appropriately.¶
An operator may also want to constrain the path computed by the PCE to a specific SR Algorithm, for example, in order to only use SR Algorithms for a low-latency path. A new TLV is introduced for this purpose.¶
Refer to [RFC8665] and [RFC8667] for details about the prefix SR Algorithm.¶
This document is extending:¶
A new TLV for signalling SR Algorithm constraint to the PCE is also introduced, to be carried inside the LSPA object, which is defined in [RFC5440].¶
The mechanisms described in this document are equally applicable to both SR-MPLS and SRv6.¶
The following terminologies are used in this document:¶
A new flag S is proposed in the SR PCE Capability Sub-TLV introduced in Section 4.1.2 of [RFC8664] in Path Computation Element Communication Protocol (PCEP) to indicate support for SR Algorithm field in the SR-ERO subobject.¶
0 1 2 3 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ | Type=26 | Length=4 | +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ | Reserved | Flags |S|N|X| MSD | +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+¶
A new flag S is proposed in the SRv6 PCE Capability sub-TLV introduced in 4.1.1 of [I-D.ietf-pce-segment-routing-ipv6] in Path Computation Element Communication Protocol (PCEP) to indicate support for SR Algorithm field in the SRv6-ERO subobject.¶
0 1 2 3 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ | Type=TBD1 | Length | +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ | Reserved | Flags |S|N|X| +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ | MSD-Type | MSD-Value | MSD-Type | MSD-Value | +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ // ... // +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ | MSD-Type | MSD-Value | Padding | +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+¶
The SR-ERO subobject encoding is extended with new flag "A" to indicate if the Algorithm field is included after other optional fields.¶
0 1 2 3 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ |L| Type=36 | Length | NT | Flags |A|V|F|S|C|M| +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ | SID (optional) | +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ // NAI (variable, optional) // +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ | Reserved | Algorithm | +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+¶
The SRv6-ERO subobject encoding is extended with new flag "A" to indicate if the Algorithm field is included after other optional fields.¶
0 1 2 3 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ |L| Type=TBD3 | Length | NT | Flags |A|V|T|F|S| +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ | Reserved | Endpoint Behavior | +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ | | | SRv6 SID (optional) | | (128-bit) | | | +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ // NAI (variable, optional) // +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ | SID Structure (optional) | +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ | Reserved | Algorithm | +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+¶
A new TLV for the LSPA Object with TLV type=TBD3 is introduced to carry the SR Algorithm constraint. This TLV SHOULD only be used when PST (Path Setup type) = SR or SRv6. Only the first instance of this TLV SHOULD be processed, subsequent instances SHOULD be ignored¶
The format of the SR Algorithm TLV is as follows:¶
0 1 2 3 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ | Type=TBD3 | Length=4 | +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ | Reserved | Flags |F|S| Algorithm | +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
The code point for the TLV type is TBD3. The TLV length is 4 octets.¶
The 32-bit value is formatted as follows.¶
This document defines the following flag bits. The other bits MUST be set to zero by the sender and MUST be ignored by the receiver.¶
PCEP speaker MAY set the A flag and include the Algorithm field in SR-ERO or SRv6-ERO subobject if the S flag was advertised by both PCEP speakers.¶
If PCEP peer receives SR-ERO subobject with the A flag set or with the SR Algorithm included, but the S flag was not advertised, then such PCEP message must be rejected with PCError as described in Section 7.2 of [RFC5440]¶
The Algorithm field MUST be included after optional SID, NAI or SID structure and length of SR-ERO or SRv6-ERO subobject MUST be increased with additional 4 bytes for Reserved and Algorithm field.¶
In order to signal a specific SR Algorithm constraint to the PCE, the headend MUST encode the SR ALGORITHM TLV inside the LSPA object.¶
Path computation MUST occur on the topology associated with specified SR algorithm. The PCE MUST NOT use of Prefix SIDs of SR Algorithm other than specified in algorithm constraint. It is allowed to use other SID types (e.g., Adjacency or Binding SID), but only from nodes participating in specified SR algorithm.¶
Specified Algorithm constraint is applied to end-to-end SR policy path. Using different Algorithm constraint in each domain or part of the topology in single path computation is out of scope of this document. One possible solution is to determine FAD mapping using PCE local policy.¶
If the PCE is unable to find a path with the given SR Algorithm constraint or it does not support combination of specified constraints, it MAY respond with empty ERO to indicate that it was not able to find valid path.¶
SR Algorithm does not replace the Objective Function defined in [RFC5541]¶
The PCE MUST follow IGP Flexible Algorithm path computation logic as described in [RFC9350]. That includes using same ordered rules to select FAD if multiple FADs are available, considering node participation of specified SR algorithm in the path computation, using ASLA specific link attributes and other rules for Flexible Algorithm path computation described in that document.¶
The PCE MUST optimize computed path based on metric type specified in the FAD, metric type included in PCEP messages from PCC MUST be ignored. The PCE SHOULD use metric type from FAD in messages sent to the PCC.¶
The PCE MUST use constraints specified in the FAD and also constraints directly included in PCEP messages from PCC. The PCE implementation MAY decide to ignore specific constraints received from PCC based on existing processing rules for PCEP Objects and TLVs, e.g. P flag described in Section 7.2 of [RFC5440] and processing rules described in [I-D.ietf-pce-stateful-pce-optional]. If the PCE does not support specified combination of constraints, it MAY respond with PCEP message with empty ERO. PCC MUST NOT include constraints from FAD in PCEP message sent to PCE as it can result in undesired behavior in various cases. PCE SHOULD NOT include constraints from FAD in PCEP messages sent to PCC.¶
The SR Algorithm constraint acts as a filter, restricting which SIDs may be used as a result of the path computation function. Path computation is done based on optimization metric type and constraints specified in PCEP message received from PCC.¶
If specified SR Algorithm is Flexible Algorithm, the PCE MUST ensure that IGP path of Flex-algo SIDs is congruant with computed path.¶
List of remaining items tracked for future draft versions, which requires more discussion.¶
No additional security measure is required.¶
IANA maintains a sub-registry, named "SR Capability Flag Field", within the "Path Computation Element Protocol (PCEP) Numbers" registry to manage the Flags field of the SR-PCE-CAPABILITY TLV. IANA is requested to make the following assignment:¶
| Value | Description | Reference |
|---|---|---|
| TBD1 | SR Algorithm Capability | This document |
IANA was requested in [I-D.ietf-pce-segment-routing-ipv6] to create a sub-registry, named "SRv6 PCE Capability Flags", within the "Path Computation Element Protocol (PCEP) Numbers" registry to manage the Flags field of SRv6-PCE-CAPABILITY sub-TLV. IANA is requested to make the following assignment:¶
| Value | Description | Reference |
|---|---|---|
| TBD2 | SR Algorithm Capability | This document |
IANA maintains a sub-registry, named "SR-ERO Flag Field", within the "Path Computation Element Protocol (PCEP) Numbers" registry to manage the Flags field of the SR-ERO Subobject. IANA is requested to make the following assignment:¶
| Value | Description | Reference |
|---|---|---|
| TBD3 | SR Algorithm Flag | This document |
IANA was requested in [I-D.ietf-pce-segment-routing-ipv6], named "SRv6-ERO Flag Field", within the "Path Computation Element Protocol (PCEP) Numbers" registry to manage the Flags field of the SRv6-ERO subobject. IANA is requested to make the following assignment:¶
| Value | Description | Reference |
|---|---|---|
| TBD4 | SR Algorithm Flag | This document |
IANA is requested to allocate a new TLV type for the new LSPA TLV specified in this document.¶
| Value | Description | Reference |
|---|---|---|
| TBD5 | SR algorithm | This document |
Mike Koldychev Cisco Systems, Inc. Email: mkoldych@cisco.com Zafar Ali Cisco Systems, Inc. Email: zali@cisco.com Stephane Litkowski Cisco Systems, Inc. Email: slitkows.ietf@gmail.com¶